Problem/Need:

• Firmware & hardware engineers often have to document binary packet/bit-field layouts (register maps, network frames, file headers). The canonical way (RFC ASCII art) is ugly; drawing them in Visio/Excel is tedious.
• Ask-HN post (https://news.ycombinator.com/item?id=30895905) got 51 pts / 17 comments; multiple engineers actively searching for an automatic tool.

Existing solutions / competitors:

1. WaveDrom (+ bitfield sub-lib) – 720 global monthly searches, KD 13 (Get_related_keywords ‘wavedrom’). Generates nice SVG but you must hand-write a WaveDrom JSON DSL; no import from Kaitai/YAML/JSON specs.
2. Mermaid ‘packet’ diagrams – text DSL, also manual, still young.
3. Graphviz struct/table hacks, SVG Bob, org-bitfield, etc. All require manual scripting.
4. Kaitai Struct can output Graphviz diagrams but they are hierarchical boxes, not bit-accurate bar diagrams.
5. No SaaS that takes an existing spec (Kaitai, protobuf, YAML, JSON schema) and spits out interactive SVG/PNG with zoom/tooltips. => White-space for “SpecSketch”.

Search-demand / keyword data (low KD <30):

• “wavedrom” – 720 vol, KD 13 (pass ≥500 rule)
• “bit field diagram” – niche (<100)
• “timing diagr...